[RFC][ARM] -Oz implies -mthumb

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[RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev

Hello,


I would like to address an issue/inconsistency related to command line options and compiling for minimum code size, and wanted to check if there would be any problems or objections to my change.


The problem is that compiling for minimum code size like this:


    -Oz --target=arm-arm--eabi -mcpu=cortex-xyz


does not really give minimum code size because -mthumb is not enabled. This looks like a sub-optimal user experience to me, and also, it is inconsistent with GCC's behaviour.


In other words: for AArch32, optimisation level -Oz targets A32, but I would like to change that to T32, and so I would like to propose that -Oz implies -mthumb.


Cheers,

Sjoerd.

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Re: [RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev
Hi Sjoerd,

On Thu, 15 Nov 2018 at 11:49, Sjoerd Meijer via cfe-dev
<[hidden email]> wrote:
> does not really give minimum code size because -mthumb is not enabled. This looks like a sub-optimal user experience to me, and also, it is inconsistent with GCC's behaviour.

Which version? None of the GCCs on Godbolt exhibit the kind of
switching you're describing as far as I can tell.

Cheers.

Tim.
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Re: [RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev
I've never tried -mcpu=cortex-xyz but I know -march=armv7 defaults to Thumb

OK, I just checked, and -mcpu=cortex-{m3,m4,m7,a7,a9,a15,a53} gives Thumb at -O1, -O1, -Os on the following gcc:

arm-linux-gnueabihf-gcc (Ubuntu/Linaro 7.3.0-27ubuntu1~18.04) 7.3.0

cortex-m0 fails because it doesn't do hard float. I don't have an eabi compiler around.


On Thu, Nov 15, 2018 at 4:14 AM, Tim Northover via cfe-dev <[hidden email]> wrote:
Hi Sjoerd,

On Thu, 15 Nov 2018 at 11:49, Sjoerd Meijer via cfe-dev
<[hidden email]> wrote:
> does not really give minimum code size because -mthumb is not enabled. This looks like a sub-optimal user experience to me, and also, it is inconsistent with GCC's behaviour.

Which version? None of the GCCs on Godbolt exhibit the kind of
switching you're describing as far as I can tell.

Cheers.

Tim.
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Re: [RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev
On Thu, 15 Nov 2018 at 12:25, Bruce Hoult <[hidden email]> wrote:
> OK, I just checked, and -mcpu=cortex-{m3,m4,m7,a7,a9,a15,a53} gives Thumb at -O1, -O1, -Os on the following gcc:

If anything I'd be inclined to just default to Thumb always. I haven't
checked myself, but rumour has it the icache benefits make it faster
than ARM code as well as smaller in most cases. My one worry there is
with reset vectors, which I believe must be implemented in ARM in some
cases; but since GCC itself appears to be inconsistent here, hopefully
those people are already explicit about their needs.

Cheers.

Tim.
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Re: [RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev
Well, yes. Thumb1 was not clear cut, but with Thumb2 there are I think only two possible things that can make Thumb very slightly slower than ARM:

1) needing an extra IT instruction to cast predication over following instructions
2) on some microarchitectures there might be a penalty for branching to an address that isn't 4-byte aligned. (probably not on recent ones)

On Thu, Nov 15, 2018 at 4:39 AM, Tim Northover <[hidden email]> wrote:
On Thu, 15 Nov 2018 at 12:25, Bruce Hoult <[hidden email]> wrote:
> OK, I just checked, and -mcpu=cortex-{m3,m4,m7,a7,a9,a15,a53} gives Thumb at -O1, -O1, -Os on the following gcc:

If anything I'd be inclined to just default to Thumb always. I haven't
checked myself, but rumour has it the icache benefits make it faster
than ARM code as well as smaller in most cases. My one worry there is
with reset vectors, which I believe must be implemented in ARM in some
cases; but since GCC itself appears to be inconsistent here, hopefully
those people are already explicit about their needs.

Cheers.

Tim.


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Re: [RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev
In reply to this post by Oleg Smolsky via cfe-dev
My understanding is that whether a gcc toolchain defaults to ARM or
Thumb is a configuration time decision by whomever builds the
toolchain. The linaro arm-linux-gnueabihf toolchain I have defaults to
-mthumb and that doesn't vary for -mcpu or any other command line
option. I haven't got a gcc to hand that defaults to -marm so that I
can test whether -mcpu=cortex-m3 will change that to Thumb. If I try
-marm -mcpu=cortex-m3 I get "error: target CPU does not support ARM
mode".

Can you give us a more concrete example about where GCC is inconsistent?

For clang I'm not particularly fond of -Oz implying a change of
instruction set state. I think that it would be difficult to document
properly, especially how to tell clang that I really did mean -Oz on
ARM. As well as being a bit messy to implement.

I think that most users of clang would prefer to use Thumb(2) than
ARM, although how to make change globally and give people enough
warning could be challenging and we'd need to get a consensus from the
community. I'd also not want to be the person updating all the tests
with -marm.

The reset vectors on some old architectures did need to be ARM state,
although I think they had to be written in assembly. It is possible
though that someone is using clang as the assembler driver and we'd
pass through -mthumb when they weren't expecting it.

Peter
On Thu, 15 Nov 2018 at 12:39, Tim Northover via cfe-dev
<[hidden email]> wrote:

>
> On Thu, 15 Nov 2018 at 12:25, Bruce Hoult <[hidden email]> wrote:
> > OK, I just checked, and -mcpu=cortex-{m3,m4,m7,a7,a9,a15,a53} gives Thumb at -O1, -O1, -Os on the following gcc:
>
> If anything I'd be inclined to just default to Thumb always. I haven't
> checked myself, but rumour has it the icache benefits make it faster
> than ARM code as well as smaller in most cases. My one worry there is
> with reset vectors, which I believe must be implemented in ARM in some
> cases; but since GCC itself appears to be inconsistent here, hopefully
> those people are already explicit about their needs.
>
> Cheers.
>
> Tim.
> _______________________________________________
> cfe-dev mailing list
> [hidden email]
> http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev
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Re: [RFC][ARM] -Oz implies -mthumb

Oleg Smolsky via cfe-dev
Sure, none of the cortex-m cores support ARM mode. Try cortex-a{5,7,8,9,15,53} etc and you'll see it works.

On Thu, Nov 15, 2018 at 5:10 AM, Peter Smith <[hidden email]> wrote:
My understanding is that whether a gcc toolchain defaults to ARM or
Thumb is a configuration time decision by whomever builds the
toolchain. The linaro arm-linux-gnueabihf toolchain I have defaults to
-mthumb and that doesn't vary for -mcpu or any other command line
option. I haven't got a gcc to hand that defaults to -marm so that I
can test whether -mcpu=cortex-m3 will change that to Thumb. If I try
-marm -mcpu=cortex-m3 I get "error: target CPU does not support ARM
mode".

Can you give us a more concrete example about where GCC is inconsistent?

For clang I'm not particularly fond of -Oz implying a change of
instruction set state. I think that it would be difficult to document
properly, especially how to tell clang that I really did mean -Oz on
ARM. As well as being a bit messy to implement.

I think that most users of clang would prefer to use Thumb(2) than
ARM, although how to make change globally and give people enough
warning could be challenging and we'd need to get a consensus from the
community. I'd also not want to be the person updating all the tests
with -marm.

The reset vectors on some old architectures did need to be ARM state,
although I think they had to be written in assembly. It is possible
though that someone is using clang as the assembler driver and we'd
pass through -mthumb when they weren't expecting it.

Peter
On Thu, 15 Nov 2018 at 12:39, Tim Northover via cfe-dev
<[hidden email]> wrote:
>
> On Thu, 15 Nov 2018 at 12:25, Bruce Hoult <[hidden email]> wrote:
> > OK, I just checked, and -mcpu=cortex-{m3,m4,m7,a7,a9,a15,a53} gives Thumb at -O1, -O1, -Os on the following gcc:
>
> If anything I'd be inclined to just default to Thumb always. I haven't
> checked myself, but rumour has it the icache benefits make it faster
> than ARM code as well as smaller in most cases. My one worry there is
> with reset vectors, which I believe must be implemented in ARM in some
> cases; but since GCC itself appears to be inconsistent here, hopefully
> those people are already explicit about their needs.
>
> Cheers.
>
> Tim.
> _______________________________________________
> cfe-dev mailing list
> [hidden email]
> http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev


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